1. Field
A solar cell is a device that converts sunlight into electricity by the photovoltaic effect. The solar cell consists of a p-n junction fabricated in a single-crystal semiconductor material, such as silicon, germanium or gallium-arsenide.
2. Description of the Related Art
Currently, silicon cells account for over 90% of the solar cell fabricated in the world (see L. L. Kazmerski, “Solar photovoltaics R&D at the tipping point: A 2005 technology overview”, J. of Electron Spectroscopy and Related Phenomena, 150 (2006), 105-135).
Silicon solar cells can be divided into three groups, depending on the quality of the material: (1) monocrystalline silicon solar cells, which can have efficiencies approaching the theoretical limit of 29%; (2) polycrystalline silicon cells, which can reach a 20% efficiency; and (3) amorphous silicon cells, which give a 12% efficiency. Although monocrystalline silicon solar cells have the highest efficiency, the high efficiency comes with the high cost of the monocrystalline silicon wafers. It has been calculated that the cost of the silicon wafer accounts for more than 50% of the total cost of producing the solar cell (Id.).
Actually, the p-n junction forming the solar cell device uses only a thin layer, i.e., 5-50 microns of silicon on the front side of the silicon wafer. The remainder silicon thickness of the wafer (a 6-in silicon wafer has a thickness of 650 microns) serves merely as a mechanical substrate. The most cost-effective solar cell would be a cell made in a thin layer of single-crystal silicon on a low-cost mechanical substrate.
Several techniques have been devised to produce thin-film crystalline silicon (see Short Course on SOI, IEDM 1990, San Francisco). Zone-melting recrystallization (ZMR) is one of these methods. ZMR has been intensively used in the early 1980's around the world as a method to fabricate silicon-on-insulator (SOI) (J. C. C. Fan et al., “Lateral epitaxy by seeded solidification for growth of crystal Si films on insulators”, Appl. Phys. Lett. 38, 365 1981; D. P. Vu et al., “Halogen lamp recrystallization of silicon on insulator substrates, J. Appl. Phys., 54, 437, 1983). SOI is a preferred material to bulk Si for integrated circuits due to its properties such as faster switching speed, suppression of latch-up for CMOS circuits and radiation resistant components (see P. M. Zavracky et al., “Silicon-on-insulator wafers by zone melting recrystallization”, Solid State Technology, April 1991, p. 55). In the ZMR process, small grain silicon (polycrystalline Si or amorphous Si, in short polySi or aSi, respectively) is melted and regrown into large grains or near single-crystal Si. Briefly, as shown in FIG. 1, in a ZMR process for making SOI, a polySi layer 12 is deposited on a silicon dioxide 13 coated silicon wafer 14. An oxide layer 11 is subsequently deposited on top of the polySi layer 12 and serves as a cap layer.
Referring to FIG. 2, the recrystallization of polySi by a ZMR technique for SOI uses a base heater 21 to raise the temperature of the sample to 1000-1200° C. A second heater, top heater 22, brings the additional energy to melt a thin band of polySi (Si melts at 1415° C.). The molten silicon band is scanned across the wafer by either moving the wafer relative to the top heater or by moving the top heater relative to the wafer. In the wake of the molten zone, silicon recrystallizes producing large Si grains.
Referring back to FIG. 1, an opening 15 in the oxide 13 at the beginning of the scan allows the polySi 12 to contact the single-crystal Si substrate 14, which serves as a single-crystal Si seed. The recrystallization is a liquid phase vertical epitaxy starting from the seed. As the molten zone moves from the opening over the oxide, the vertical epitaxy turns into a lateral epitaxy, as shown by the arrow in FIG. 1. The result is the conversion of a polySi layer to a near single-crystal Si layer.
Two main methods were developed to perform ZMR of silicon. They are characterized by the dwell time, i.e., the time the silicon remains in the liquid phase. With a laser as the top heater, due to the high concentration of energy in the laser beam, the dwell time can be in a nanosecond (pulsed laser) or millisecond range (CW laser). With a graphite strip or with a halogen lamp, this time is in a second range. The two methods serve two different applications. With a laser, the very short dwell time allows to locally melt silicon without damaging any device placed nearby or underneath. This method has led to the fabrication of three-dimensional structures (see T. Nishimura et al., “Three dimensional IC for high performance image signal processor”, IEDM 1987, p. 111). With the graphite strip or the halogen lamp, the long dwell time can only produce material in which devices/circuits can be processed afterward.
FIG. 2 shows a ZMR system using halogen lamps (see M. Haond et al., “<100> Single crystal SOI films obtained on 4-in wafers using halogen lamps,” MRS Fall Meeting Symp. Proc., vol 53, p. 83, 1986). The system consists of a bank of linear halogen lamps 21 to preheat the wafer 24 uniformly to 1000-1200° C. A focused beam from another halogen lamp 22 scans across the wafer 24 to bring the additional energy to melt a narrow band 23 of the poly-Si layer on the wafer 24. In a graphite heater system, the base heater is a graphite sheet and the top heater is a graphite wire (see description in U.S. Pat. Nos. 4,885,052, 5,021,119, and 5,453,153).
Using a graphite heater or a halogen lamp system, under optimum conditions, single-crystal Si was obtained with a small amount of minor defects like threading dislocations and subgrain boundaries (see U.S. Pat. No. 5,453,153).
In recent years, ZMR has been used to produce thin-film silicon for solar cells. To reduce cost, research was done on a thin microcrystalline silicon layer deposited on a foreign substrate-ceramics (the silicon wafer 14 shown in the SOI structure of FIG. 1 is replaced by a low-cost ceramic substrate). But without the presence of a single-crystal silicon seed only enlarged silicon grains are obtained (see S. Reber et al., “Progress in crystalline silicon thin-film solar cell work at Fraunhofer ISE,” European Photovoltaic Solar Energy Conference and Exhibition, June 2005, Barcelona).
Another method to produce thin-film material for solar cells (and in general integrated circuits (ICs)) is the Circuit Transfer in which circuits processed in standard IC processing lines are transferred to alternative substrates. The advantage of this technique is the freedom in the choice of the final substrate and the possibility of reusing of the original substrate (see M. B. Spitzer et al., “Application of circuit transfer to displays and optoelectronic devices,” Optoelectronic Packaging Conf, SPIE Photonics West 1996 Symposium, also see U.S. Pat. No. 5,256,562).
The circuit transfer for a gallium-arsenide (GaAs) solar cell fabrication was first used by McClelland to reduce the fabrication cost of GaAs substrate (McClelland et al., “A technique for producing epitaxial films on reusable substrates”, Appl. Phys. Lett. 37, 560, Sep. 15, 1980). ICs processed in the silicon thin-film of an SOI wafer have been transferred to glass for flat-panel microdisplays (J. P. Salerno et al., “Single-crystal silicon transmissive AMLCD”, SID, Boston, Mass. 1992).